Technical Field
The present invention generally relates to interconnect structures for semiconductor devices. More particularly, the present invention relates to realizing a metal line pitch lower than lithographic resolution and reducing or eliminating unwanted line cuts.
Background Information
As semiconductor devices continue to shrink, the resolution obtainable with lithography limits its accuracy. For example, when cutting lines with a pitch of less than the lithographic resolution, current lithography tools may also cut lines adjacent to the line of interest.
Thus, a need exists for a way to compensate for the limitations of current lithographic tools.